Most things don't start out complicated. In fact, paradoxically, sometimes the things that start the simplest end up accumulating the most complexity over time. The process of loading code onto the FPGA version of the GPGPU I've been working on has become kind of messy, and I've been considering how to clean it up. The challenge with a project like this is that it highly unconstrained. Much like deciding what to have for dinner, the number of choices can be overwhelming. However, simplicity and ease of setup are a high priority for me, so that's at least a useful guiding criterion.
Showing posts with label FPGA. Show all posts
Showing posts with label FPGA. Show all posts
Saturday, March 21, 2015
Thursday, August 21, 2014
"It works in the simulator..."
I do most hardware development in simulation. It allows a level of visibility that software developers can only dream of: I can see the state of every signal at every instant for the entire run. But there is a dark side to simulation: the synthesized design may not behave the same as the simulation. There are a few well known patterns that lead to synthesis/simulation mismatches that are easy enough to avoid with attentive coding, but the existence of these gremlins always leaves me uneasy...
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